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authorLoic GUEGAN <loic.guegan@yahoo.fr>2018-09-02 20:02:27 +0200
committerLoic GUEGAN <loic.guegan@yahoo.fr>2018-09-02 20:02:27 +0200
commitef427a9944e805103ed8c82d3944918b3d46d53f (patch)
tree5e5f42443127d4b87011857e3d8895e025fd9b4a /MicSim/micsim.py
parent19ab0b8eb760457ce7a7573230d5f441cd51359d (diff)
Clean code
Diffstat (limited to 'MicSim/micsim.py')
-rwxr-xr-xMicSim/micsim.py13
1 files changed, 3 insertions, 10 deletions
diff --git a/MicSim/micsim.py b/MicSim/micsim.py
index a45311f..c4cb6c3 100755
--- a/MicSim/micsim.py
+++ b/MicSim/micsim.py
@@ -4,15 +4,8 @@ from components.microprogram import Microprogram
from components.ram import Ram
from components.caretaker import Caretaker
-c=Caretaker() # Init components
-RAM=Ram(c,5000) # Init ram
-RAM.loadRamFile("./ram.txt") # Load Ram from file
-c["RAM"]=RAM # Add ram to components
-
+c=Caretaker(5000) # Init components (stackLocation)
+c["RAM"].loadRamFile("./ram.txt") # Load Ram from file
mic=Microprogram(c) # Create micro program
-mic.run() # Run the micro program
-
-mic.rd()
-print(bin(c["MDR"]))
-print(RAM.dump())
+mic.run(800, 1024) # Run the micro program with run(constantPoolLocation,stackLocation)