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authorLoic Guegan <manzerbredes@mailbox.org>2021-04-27 19:02:17 +0200
committerLoic Guegan <manzerbredes@mailbox.org>2021-04-27 19:02:17 +0200
commitf13b26eeb4f9afba3a1aed2516655b34139979aa (patch)
tree9ec48586fa57749f2c1cb40d940863d2251bd401 /src/core
parent9dc527b3be9d493dcf8cf1baf78477373eb5990d (diff)
Making kernel Higher-Half
Diffstat (limited to 'src/core')
-rw-r--r--src/core/apic.cc11
-rw-r--r--src/core/apic.hpp2
-rw-r--r--src/core/gdt.S25
-rw-r--r--src/core/idt.cc28
-rw-r--r--src/core/idt.hpp5
-rw-r--r--src/core/int.S4
-rw-r--r--src/core/paging.cc62
-rw-r--r--src/core/paging.hpp16
8 files changed, 104 insertions, 49 deletions
diff --git a/src/core/apic.cc b/src/core/apic.cc
index a93e54e..0663014 100644
--- a/src/core/apic.cc
+++ b/src/core/apic.cc
@@ -5,18 +5,17 @@
#include "asm.hpp"
#include "libs/stdio.hpp"
-extern u64* kpml4;
char enable=0;
#define APIC_LAPIC_ADDR 0xFEE00000
#define APIC_IOAPIC_ADDR 0xFEC00000
#define APIC_LAPIC_REG_SPURIOUS 0xF0
void apic_enable(){
- // Allocate APIC registers
- paging_allocate_addr(kpml4, APIC_LAPIC_ADDR, APIC_LAPIC_ADDR,
- PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
- paging_allocate_addr(kpml4, APIC_IOAPIC_ADDR, APIC_IOAPIC_ADDR,
- PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
+ // Allocate APIC registers TODODODODOOD!!!!!
+ // paging_allocate_addr(kpml4, APIC_LAPIC_ADDR, APIC_LAPIC_ADDR,
+ //PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
+ //paging_allocate_addr(kpml4, APIC_IOAPIC_ADDR, APIC_IOAPIC_ADDR,
+ //PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
// Configure APIC register location
u32 h=APIC_LAPIC_ADDR>>32;
diff --git a/src/core/apic.hpp b/src/core/apic.hpp
index edfeaa3..a2670b3 100644
--- a/src/core/apic.hpp
+++ b/src/core/apic.hpp
@@ -1,6 +1,6 @@
#pragma once
-
+#include "include/boucane.hpp"
void apic_enable(); \ No newline at end of file
diff --git a/src/core/gdt.S b/src/core/gdt.S
new file mode 100644
index 0000000..f928b3f
--- /dev/null
+++ b/src/core/gdt.S
@@ -0,0 +1,25 @@
+.code64
+
+gdt64:
+ gdt64_null:
+ .long 0
+ .long 0
+ gdt64_cs:
+ .long 0
+ .byte 0
+ .byte 0b10011100
+ .byte 0b00100000
+ .byte 0
+ gdt64_ds:
+ .long 0
+ .byte 0
+ .byte 0b10010010
+ .word 0
+gdtr:
+ .word . - gdt64 - 1
+ .quad gdt64
+
+.global load_gdt
+load_gdt:
+ lgdt (gdtr)
+ ret
diff --git a/src/core/idt.cc b/src/core/idt.cc
index a73d92c..25264b6 100644
--- a/src/core/idt.cc
+++ b/src/core/idt.cc
@@ -1,14 +1,16 @@
#include "idt.hpp"
+#include "core/paging.hpp"
#include "libs/string.hpp"
-IDT_REGISTER IDTR = {
- IDT_GATE_SIZE*IDT_MAX_ENTRIES,
- IDT_ADDR
-};
+u32 idt[IDT_MAX_ENTRIES][4] __attribute__((aligned(4096)));;
+IDT_REGISTER IDTR;
extern u64 INT_DEFAULT,INT_0,INT_14,INT_KBD;
void idt_enable_interrupt(void){
+ IDTR.base=((u64)idt);
+ IDTR.limit=sizeof(idt);
+
IDT_DESCRIPTOR d;
d.ign=0;
d.ist=0;
@@ -25,7 +27,7 @@ void idt_enable_interrupt(void){
d.offset=(u64)&INT_14;
idt_write_descriptor(d, i);
}
- else if(i==60){ // Page fault
+ else if(i==60){ // Keyboard
d.offset=(u64)&INT_KBD;
idt_write_descriptor(d, i);
}
@@ -34,12 +36,11 @@ void idt_enable_interrupt(void){
idt_write_descriptor(d, i);
}
}
-
+
// Enable interrupts
asm(
- "lidt (IDTR) \n\t"
- "sti \n\t"
- );
+ "lidt (IDTR) \n\t"
+ "sti \n\t ");
}
void idt_write_descriptor(IDT_DESCRIPTOR desc, u16 index){
@@ -47,9 +48,8 @@ void idt_write_descriptor(IDT_DESCRIPTOR desc, u16 index){
u32 desc32_63=desc.ist | desc.options | (desc.offset&0xFFFF0000);
u32 desc64_95=desc.offset>>32;
u32 desc96_127=desc.ign;
- u32* dst=(u32*)(IDTR.base+index*IDT_GATE_SIZE);
- *dst=desc0_31;
- *(dst+1)=desc32_63;
- *(dst+2)=desc64_95;
- *(dst+3)=desc96_127;
+ idt[index][0]=desc0_31;
+ idt[index][1]=desc32_63;
+ idt[index][2]=desc64_95;
+ idt[index][3]=desc96_127;
} \ No newline at end of file
diff --git a/src/core/idt.hpp b/src/core/idt.hpp
index 2f2050d..1133ad1 100644
--- a/src/core/idt.hpp
+++ b/src/core/idt.hpp
@@ -5,7 +5,7 @@
#define IDT_GATE_SIZE 16
#define IDT_MAX_ENTRIES 200
-#define IDT_ADDR 0x200000
+#define IDT_ADDR 0
#define IDT_OPT_P (1 << 15)
#define IDT_OPT_TYPE_INT 0xE << 8
@@ -27,5 +27,8 @@ typedef struct IDT_DESCRIPTOR {
u32 ign;
} __attribute__((packed)) IDT_DESCRIPTOR;
+/// @brief 3 u32 per entry
+extern u32 idt[IDT_MAX_ENTRIES][4];
+
void idt_enable_interrupt(void);
void idt_write_descriptor(IDT_DESCRIPTOR desc, u16 index); \ No newline at end of file
diff --git a/src/core/int.S b/src/core/int.S
index 1c8d7bb..daf0224 100644
--- a/src/core/int.S
+++ b/src/core/int.S
@@ -1,3 +1,5 @@
+.code64
+
.extern printk
.extern ack
@@ -40,4 +42,4 @@ MSG_INT_14:
MSG_INT_KBD:
.asciz "Key press!"
MSG:
-.asciz "Called :)\n" \ No newline at end of file
+.asciz "Called :)\n"
diff --git a/src/core/paging.cc b/src/core/paging.cc
index 8e58511..73a5c63 100644
--- a/src/core/paging.cc
+++ b/src/core/paging.cc
@@ -4,29 +4,50 @@
#include "libs/string.hpp"
char paging_status[PAGING_MAX_PAGE / 8];
-u64* kpml4;
+u64 kernel_vma,stack_pma,userspace_pma;
+u64 kpages[MAX_TABLES][512] __attribute__((aligned(4096)));
+int kpages_next=1; // First page is for the pml4
+
+u64* paging_allocate_table(){
+ u64 addr=(u64)kpages[kpages_next];
+ u64* allocated=(u64*)(addr-kernel_vma);
+ kpages_next++;
+ return allocated;
+}
void paging_enable() {
+ // Init linker variables
+ asm("movq $__kernel_vma, %0":"=r"(kernel_vma));
+ asm("movq $__userspace_pma, %0":"=r"(userspace_pma));
+ asm("movq $__stack_pma, %0":"=r"(stack_pma));
+
// Init status
for (int i = 0; i < PAGING_MAX_PAGE / 8; i++) {
paging_status[i] = 0;
}
+ // Init tables
+ for(int i=0;i<MAX_TABLES;i++){
+ memset(kpages[i], 0, 512*64);
+ }
+
// Allocate paging for the kernel (to not override the source
// code during the next paging_allocate_table() calls)
- paging_allocate_contiguous(PAGING_KERNEL_USED_PAGE);
+ paging_allocate_contiguous(userspace_pma/4096);
// Setting up new kernel address space
- kpml4=paging_allocate_table();
- for(int i=0;i<PAGING_KERNEL_SPACE_MAX_PAGE;i++){
- int addr=i*4096;
- paging_allocate_addr(kpml4,addr,addr, PAGING_OPT_P|PAGING_OPT_RW); // Identity map
+ for(u64 i=0;i<=0x10000000;i+=4096){
+ paging_allocate_addr(kpages[0],kernel_vma+i,i, 0x3,0); // Identity map
}
+ // 4096 bytes stack
+ paging_allocate_addr(kpages[0],kernel_vma-4096,stack_pma,0x3,0);
+
// Load new pml4
+ u64 kpage_phy=((u64)kpages[0]-kernel_vma);
asm volatile(
- "movq %0, %%rax \n\t"
- "movq %%rax, %%cr3 \n\t"
- :: "r" (kpml4));
+ "mov %0, %%rax \n\t"
+ "mov %%rax, %%cr3 \n\t"
+ :: "r" (kpage_phy));
}
u64 paging_as_phy(u64* pml4_table, u64 virt){
@@ -40,6 +61,7 @@ u64 paging_as_phy(u64* pml4_table, u64 virt){
u64* pt_table=(u64*)PAGE(pd_table[pd]);
return((PAGE(pt_table[pt]))|(virt&0xFFF));
}
+
u64* paging_allocate_contiguous(int npages){
int n_contiguous=0;
for (int i = 0; i < PAGING_MAX_PAGE / 8; i++) {
@@ -116,12 +138,6 @@ void paging_dump(int min, int max) {
}
}
-u64* paging_allocate_table(){
- u64* table=paging_allocate_contiguous(8);
- memset(table, 0, 32768); // nb_entries * entry size = 512 * 64
- return table;
-}
-
void paging_deallocate_table(u64* table){
char *c_table=(char*)PAGE((u64)table);
for(u8 i=0;i<8;i++){
@@ -130,7 +146,7 @@ void paging_deallocate_table(u64* table){
}
}
-void paging_allocate_addr(u64* pml4_table, u64 virt, u64 phy, u16 options){
+void paging_allocate_addr(u64* pml4_table, u64 virt, u64 phy, u16 options, u64 offset){
u16 pml4=virt>>39&0x1FF;
u16 pdp=virt>>30&0x1FF;
u16 pd=virt>>21&0x1FF;
@@ -141,27 +157,29 @@ void paging_allocate_addr(u64* pml4_table, u64 virt, u64 phy, u16 options){
if(pml4_table[pml4] == 0){
pml4_table[pml4]=(u64)paging_allocate_table();
pml4_table[pml4]|=options;
- paging_allocate_addr(pml4_table,virt,phy,options);
+ paging_allocate_addr(pml4_table,virt,phy,options,offset);
return;
}
+
// Solve pd
- u64* pdp_table=(u64*)PAGE(pml4_table[pml4]);
+ u64* pdp_table=(u64*)(PAGE(pml4_table[pml4])+offset);
if(pdp_table[pdp] == 0){
pdp_table[pdp]=(u64)paging_allocate_table();
pdp_table[pdp]|=options;
- paging_allocate_addr(pml4_table,virt,phy,options);
+ paging_allocate_addr(pml4_table,virt,phy,options,offset);
return;
}
+
// Solve pt
- u64* pd_table=(u64*)PAGE(pdp_table[pdp]);
+ u64* pd_table=(u64*)(PAGE(pdp_table[pdp])+offset);
if(pd_table[pd] == 0){
pd_table[pd]=(u64)paging_allocate_table();
pd_table[pd]|=options;
- paging_allocate_addr(pml4_table,virt,phy,options);
+ paging_allocate_addr(pml4_table,virt,phy,options,offset);
return;
}
// Solve address
- u64* pt_table=(u64*)PAGE(pd_table[pd]);
+ u64* pt_table=(u64*)(PAGE(pd_table[pd])+offset);
if(pt_table[pt] == 0){
pt_table[pt]=PAGE(phy);
pt_table[pt]|=options;
diff --git a/src/core/paging.hpp b/src/core/paging.hpp
index 4bb668c..089bd47 100644
--- a/src/core/paging.hpp
+++ b/src/core/paging.hpp
@@ -18,9 +18,14 @@
/// @brief Get page address that contain addr
#define PAGE(addr) (addr&(~(0xFFF)))
-#define PAGING_MAP(addr) paging_allocate_addr(kpml4,(u64)(addr),(u64)(addr),PAGING_OPT_P|PAGING_OPT_RW)
+#define PAGING_MAP(addr) paging_allocate_addr(kpages[0],(u64)(addr),(u64)(addr),PAGING_OPT_P|PAGING_OPT_RW,kernel_vma)
+#define MAX_TABLES 280
-extern u64* kpml4;
+/// @brief All PAE table structures are allocated here
+extern u64 kpages[MAX_TABLES][512];
+
+/// @brief Various variables from the linker
+extern u64 kernel_vma,stack_pma,userspace_pma;
/**
* Setup and enable PAE paging
@@ -56,13 +61,16 @@ void paging_deallocate_table(u64* table);
/**
* Allocate table structure (pml4, pdp etc..)
*/
-u64* paging_allocate_table();
+u64* paging_allocate_table_local();
/**
* Map virtual page associated to virt
* to the physical page associated with phy
+ * Offset can be used to convert pml4_table address
+ * content to virtual addresses (since physical addresses from the pml4_table are not
+ * available after the trampoline into High-Half memory)
*/
-void paging_allocate_addr(u64* pml4_table,u64 virt, u64 phy, u16 options);
+void paging_allocate_addr(u64* pml4_table,u64 virt, u64 phy, u16 options, u64 offset);
/**
* Get associated physical address