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-rw-r--r--components/ram.py18
1 files changed, 18 insertions, 0 deletions
diff --git a/components/ram.py b/components/ram.py
index d503929..ddf48d1 100644
--- a/components/ram.py
+++ b/components/ram.py
@@ -8,6 +8,9 @@ class Ram:
self.c=components
def loadRamFile(self,filepath):
+ """
+ Load a Ram file into self.data
+ """
data=dict()
addr=0
f=open(filepath,"r")
@@ -22,12 +25,18 @@ class Ram:
self.data=data
def write(self):
+ """
+ Write data to memory based Mic-1 architecture
+ """
addr=self.c["MAR"]
if addr>self.lastAddr:
raise ValueError("You get out of the ram by trying to set a value at address {}, max address is {}".format(addr,self.lastAddr))
self.data[addr]=self.c["MDR"]
def read(self):
+ """
+ Read data from memory based Mic-1 architecture
+ """
addr=self.c["MAR"]
value=None
try:
@@ -40,6 +49,9 @@ class Ram:
return(value)
def fetch(self):
+ """
+ Fetch next byte from memory based Mic-1 architecture
+ """
addr=self.c["PC"]
value=None
try:
@@ -52,11 +64,17 @@ class Ram:
return(value)
def dump(self):
+ """
+ Simple dump helper
+ """
for key,value in self.data.items():
#print("{}:{}".format(key,bin(value)[2:]))
print("{}:{}".format(key,value))
def dumpRange(self,start,end):
+ """
+ Another dump helper
+ """
for i in range(start,end+1):
try:
print("{}:{}".format(i,self.data[i]))