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-rw-r--r--MicSim/test/test_caretaker.py10
-rw-r--r--MicSim/test/test_ram.py9
2 files changed, 7 insertions, 12 deletions
diff --git a/MicSim/test/test_caretaker.py b/MicSim/test/test_caretaker.py
index cc8d2ef..d256a29 100644
--- a/MicSim/test/test_caretaker.py
+++ b/MicSim/test/test_caretaker.py
@@ -16,12 +16,12 @@ class CaretakerTest(unittest.TestCase):
"""
Test if getitem operation follow Mic-1 rules
"""
- for toWrite in range(0,127):# Only 7 bit for signed MBR (2^7=127)
+ for toWrite in range(0,127): # Only 7 bit for signed MBR (2^7=127)
self.c["MBR"]=-toWrite
self.assertEqual(self.c["MBRU"],toWrite,"Tested with {}".format(-toWrite))
self.assertEqual(self.c["MBR"],-toWrite,"Tested with {}".format(-toWrite))
- for toWrite in range(0,255):# Only 2^8 value for unsigned
+ for toWrite in range(0,255): # Only 2^8 value for unsigned
self.c["MBR"]=toWrite
self.assertEqual(self.c["MBRU"],toWrite,"Tested with {}".format(toWrite))
if toWrite>127: # We enter in the zone of negative number at 127
@@ -40,7 +40,7 @@ class CaretakerTest(unittest.TestCase):
with self.assertRaises(Exception):
self.c["PC"]=-(2**31)
- def test___setitem__(self):
+ def test___setitem__(self): # TODO: improve tests
"""
Test if getitem operation follow Mic-1 rules
"""
@@ -50,9 +50,5 @@ class CaretakerTest(unittest.TestCase):
self.fail("Failed to assign RAM to caretaker")
-
-
-
-
if __name__ == "__main__":
unittest.main()
diff --git a/MicSim/test/test_ram.py b/MicSim/test/test_ram.py
index f755753..a631180 100644
--- a/MicSim/test/test_ram.py
+++ b/MicSim/test/test_ram.py
@@ -11,7 +11,7 @@ class RamTest(unittest.TestCase):
Init test
"""
self.caretaker=dict({"MDR":0,"MAR":0,"MBR":0,"PC":0})
- self.ramSize=1000*4 # Ram size should be a multiple of 4 to guaranty test validity
+ self.ramSize=1000*4 # I suppose ram size should be a multiple of 4 to guaranty test validity
def test_write(self):
"""
@@ -22,16 +22,15 @@ class RamTest(unittest.TestCase):
toWrite=randint(0,2**i) # Pick a random number to write
self.caretaker["MDR"]=toWrite
self.caretaker["MAR"]=randint(0,self.ramSize-1)
-
ram=Ram(self.caretaker,self.ramSize)
ram.write() # Write a random number at address 0
-
data=ram.getData() # Dump ram
##### Test if everything is written using big endian model #####
self.assertEqual((toWrite>>24)&0xFF,data[self.caretaker["MAR"]])
self.assertEqual((toWrite>>16)&0xFF,data[self.caretaker["MAR"]+1])
self.assertEqual((toWrite>>8)&0xFF,data[self.caretaker["MAR"]+2])
self.assertEqual(toWrite&0xFF,data[self.caretaker["MAR"]+3])
+
# Test error is raise when writing out of memory
self.caretaker["MDR"]=randint(0,2**i)
self.caretaker["MAR"]=1000 # Write out of memory (positive address)
@@ -79,11 +78,11 @@ class RamTest(unittest.TestCase):
"""
Test fetch method
"""
- for q in range(0,1999):
+ for q in range(0,1999): # For fun
# Test classical fetch
ram=Ram(self.caretaker,self.ramSize)
- data=dict()
toWrite=randint(0,256-1)
+ data=dict()
for i in range(0,self.ramSize):
data[i]=toWrite
ram.setData(data)