diff options
Diffstat (limited to 'MicSim/test/test_ram.py')
| -rw-r--r-- | MicSim/test/test_ram.py | 74 |
1 files changed, 63 insertions, 11 deletions
diff --git a/MicSim/test/test_ram.py b/MicSim/test/test_ram.py index 1570e0d..2a9b932 100644 --- a/MicSim/test/test_ram.py +++ b/MicSim/test/test_ram.py @@ -16,19 +16,71 @@ class RamTest(unittest.TestCase): """ Test write method """ - toWrite=randint(0,2**32) # Pick a random number to write - self.caretaker["MDR"]=toWrite - ram=Ram(self.caretaker,10000) - ram.write() # Write a random number at address 0 - - data=ram.dump() # Dump ram - ##### Test if everything is written using big endian model ##### - self.assertEqual((toWrite>>24)&0xFF,data[self.caretaker["MAR"]]) - self.assertEqual((toWrite>>16)&0xFF,data[self.caretaker["MAR"]+1]) - self.assertEqual((toWrite>>8)&0xFF,data[self.caretaker["MAR"]+2]) - self.assertEqual(toWrite&0xFF,data[self.caretaker["MAR"]+3]) + # Test write action + for i in range(0,32): # Test for n number + toWrite=randint(0,2**i) # Pick a random number to write + self.caretaker["MDR"]=toWrite + self.caretaker["MAR"]=randint(0,10000-1) + ram=Ram(self.caretaker,10000) + ram.write() # Write a random number at address 0 + + data=ram.getData() # Dump ram + ##### Test if everything is written using big endian model ##### + self.assertEqual((toWrite>>24)&0xFF,data[self.caretaker["MAR"]]) + self.assertEqual((toWrite>>16)&0xFF,data[self.caretaker["MAR"]+1]) + self.assertEqual((toWrite>>8)&0xFF,data[self.caretaker["MAR"]+2]) + self.assertEqual(toWrite&0xFF,data[self.caretaker["MAR"]+3]) + # Test error is raise when writing out of memory + self.caretaker["MDR"]=randint(0,2**i) + self.caretaker["MAR"]=1000 # Write out of memory (positive address) + ram=Ram(self.caretaker,1000) + with self.assertRaises(Exception): + ram.write() + self.caretaker["MDR"]=randint(0,2**i) + self.caretaker["MAR"]=-1000 # Write out of memory (negative address) + ram=Ram(self.caretaker,1000) + with self.assertRaises(Exception): + ram.write() + + def test_read(self): + """ + Test read method + """ + ram=Ram(self.caretaker,10000) + data=dict() + toWrite=randint(0,256-1) + for i in range(0,10000): # Write in memory + data[i]=toWrite # Write the random byte + ram.setData(data) + for i in range(0,int(10000/4)): # Read and check if its what we wrote + self.caretaker["MAR"]=i*4 + data=ram.read() # Read start at 0 addr + self.assertEqual(toWrite,(data>>24)&0xFF) + self.assertEqual(toWrite,(data>>16)&0xFF) + self.assertEqual(toWrite,(data>>8)&0xFF) + self.assertEqual(toWrite,data&0xFF) + # Try to read outside of the memory + with self.assertRaises(Exception): + self.caretaker["MAR"]=10000 + ram.read() + with self.assertRaises(Exception): + self.caretaker["MAR"]=-10000 + ram.read() + + def test_fetch(self): + """ + Test fetch method + """ + ram=Ram(self.caretaker,10000) + for i in range(1,10000): + self.caretaker["MDR"]=i + self.caretaker["MAR"]=i + ram.write() + + + if __name__ == "__main__": unittest.main() |