aboutsummaryrefslogtreecommitdiff
path: root/MicSim/test/test_caretaker.py
diff options
context:
space:
mode:
Diffstat (limited to 'MicSim/test/test_caretaker.py')
-rw-r--r--MicSim/test/test_caretaker.py10
1 files changed, 3 insertions, 7 deletions
diff --git a/MicSim/test/test_caretaker.py b/MicSim/test/test_caretaker.py
index cc8d2ef..d256a29 100644
--- a/MicSim/test/test_caretaker.py
+++ b/MicSim/test/test_caretaker.py
@@ -16,12 +16,12 @@ class CaretakerTest(unittest.TestCase):
"""
Test if getitem operation follow Mic-1 rules
"""
- for toWrite in range(0,127):# Only 7 bit for signed MBR (2^7=127)
+ for toWrite in range(0,127): # Only 7 bit for signed MBR (2^7=127)
self.c["MBR"]=-toWrite
self.assertEqual(self.c["MBRU"],toWrite,"Tested with {}".format(-toWrite))
self.assertEqual(self.c["MBR"],-toWrite,"Tested with {}".format(-toWrite))
- for toWrite in range(0,255):# Only 2^8 value for unsigned
+ for toWrite in range(0,255): # Only 2^8 value for unsigned
self.c["MBR"]=toWrite
self.assertEqual(self.c["MBRU"],toWrite,"Tested with {}".format(toWrite))
if toWrite>127: # We enter in the zone of negative number at 127
@@ -40,7 +40,7 @@ class CaretakerTest(unittest.TestCase):
with self.assertRaises(Exception):
self.c["PC"]=-(2**31)
- def test___setitem__(self):
+ def test___setitem__(self): # TODO: improve tests
"""
Test if getitem operation follow Mic-1 rules
"""
@@ -50,9 +50,5 @@ class CaretakerTest(unittest.TestCase):
self.fail("Failed to assign RAM to caretaker")
-
-
-
-
if __name__ == "__main__":
unittest.main()