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-rw-r--r--MicSim/components/microprogram.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/MicSim/components/microprogram.py b/MicSim/components/microprogram.py
index ec84886..c2a3552 100644
--- a/MicSim/components/microprogram.py
+++ b/MicSim/components/microprogram.py
@@ -32,7 +32,9 @@ class Microprogram:
"""
Read data into memory
"""
+ self.c["MAR"]=self.c["MAR"]*4 # Don't forget MAR address 32bits block of memory
little_endian=self.c["RAM"].read()
+ self.c["MAR"]=self.c["MAR"]/4 # Restore MAR
##### Build little endian version of MDR ####
big_endian=(little_endian&0xFF)<<24
big_endian=big_endian|(((little_endian>>8)&0xFF)<<16)
@@ -53,7 +55,9 @@ class Microprogram:
##############################################
big_endian=self.c["MDR"] # Backup MDR before change it to little endian
self.c["MDR"]=little_endian # Load little endian value
+ self.c["MAR"]=self.c["MAR"]*4 # Don't forget MAR address 32bits block of memory
self.c["RAM"].write() # Write little endian value into memory
+ self.c["MAR"]=self.c["MAR"]/4 # Restore MAR
self.c["MDR"]=big_endian # Restore big endian
def exec(self): # TODO: Implement opcode