diff options
Diffstat (limited to 'MicSim/components/microprogram.py')
| -rw-r--r-- | MicSim/components/microprogram.py | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/MicSim/components/microprogram.py b/MicSim/components/microprogram.py index 12f38e4..eafba61 100644 --- a/MicSim/components/microprogram.py +++ b/MicSim/components/microprogram.py @@ -12,31 +12,31 @@ class Microprogram: """ Start microprogram """ - self.c["LV"]=stackLocation# Place stack to 1024 - self.c["SP"]=stackLocation-1 # Init SP to LV-1 (because otherwise first element of the stack will be enty because of BIPUSH impl - self.c["CPP"]=constantPoolLocation + self.c["LV"]=stackLocation # Init stack location + self.c["SP"]=stackLocation-1 # Init SP to LV-1 otherwise first element of the stack will be empty (because of BIPUSH implementation) + self.c["CPP"]=constantPoolLocation # Init constant pool location - for i in range(1,30): # Launche first 30 insctructions - self.fetch() # Fetch - self.c["PC"]+=1 # INC PC after fetch - if self.exec()==1: # Execute opcode and halt if return code is 1 + for i in range(1,100): # Launch 100 first instructions (Find another solution) + self.fetch() # Fetch + self.c["PC"]+=1 # INC PC after fetch + if self.exec()==1: # Execute opcode and halt if return code is 1 break; - def fetch(self): + def fetch(self): # "Structured Computer Organization" implementation """ Fetch next byte from memory into MBR """ opcode=self.c["RAM"].fetch() self.c["MBR"]=opcode # Opcode to MBR - def rd(self): + def rd(self): # "Structured Computer Organization" implementation """ Read data into memory """ self.c["MAR"]=self.c["MAR"]*4 # Don't forget MAR address 32bits block of memory little_endian=self.c["RAM"].read() self.c["MAR"]=self.c["MAR"]/4 # Restore MAR - ##### Build little endian version of MDR #### + ##### Restore bit order into big endian #### big_endian=(little_endian&0xFF)<<24 big_endian=big_endian|(((little_endian>>8)&0xFF)<<16) big_endian=big_endian|(((little_endian>>16)&0xFF)<<8) @@ -44,7 +44,7 @@ class Microprogram: ############################################## self.c["MDR"]=big_endian - def wr(self): + def wr(self): # "Structured Computer Organization" implementation """ Write data into memory """ @@ -61,7 +61,7 @@ class Microprogram: self.c["MAR"]=self.c["MAR"]/4 # Restore MAR self.c["MDR"]=big_endian # Restore big endian - def exec(self): # TODO: Implement opcode + def exec(self): # TODO: Implement some other opcodes """ Execute next opcode """ @@ -147,11 +147,11 @@ class Microprogram: self.rd() self.c["TOS"]=self.c["MDR"] elif opcode==ijvm["IINC"]: - self.fetch();self.c["PC"]+=1 # Fetch local variable offset to inc + self.fetch();self.c["PC"]+=1 # Fetch local variable offset to increment self.c["H"]=self.c["LV"] self.c["MAR"]=self.c["MBRU"]+self.c["H"] self.rd() - self.fetch();self.c["PC"]+=1 # Fetch inc value + self.fetch();self.c["PC"]+=1 # Fetch increment value self.c["H"]=self.c["MDR"] self.c["MDR"]=self.c["MBR"]+self.c["H"] self.wr() @@ -164,7 +164,7 @@ class Microprogram: self.c["PC"]=self.c["OPC"]+self.c["H"] elif opcode==ijvm["OUT"]: self.fetch();self.c["PC"]+=1 # Fetch byte to push in MBR - print(str(chr(self.c["MBRU"])),end="") # MBRU because no char which are negative + print(str(chr(self.c["MBRU"])),end="") # MBRU because there is no negative char elif opcode==ijvm["IFEQ"]: self.c["SP"]=self.c["SP"]-1 self.c["MAR"]=self.c["SP"] @@ -194,7 +194,7 @@ class Microprogram: raise RuntimeError("Instruction {} not found on address {}".format(opcode,self.c["PC"]-1)) return(0) - def T(self): # This function is here just to follow ijvm implementation of "Structured Computer Organization" + def T(self): # "Structured Computer Organization" implementation self.fetch();self.c["PC"]+=1 # exactly like GOTO implementation self.c["OPC"]=self.c["PC"]-1 # exactly like GOTO implementation ###### GOTO2 ##### @@ -204,7 +204,7 @@ class Microprogram: self.c["PC"]=self.c["OPC"]+self.c["H"] ################## - def F(self): # This function is here just to follow ijvm implementation of "Structured Computer Organization" + def F(self): # "Structured Computer Organization" implementation self.fetch();self.c["PC"]+=1 # Needed because memory access take 1 cycle in simulation self.c["PC"]=self.c["PC"]+1 |