diff options
| -rw-r--r-- | components/microprogram.py | 33 | ||||
| -rw-r--r-- | ram.txt | 10 |
2 files changed, 40 insertions, 3 deletions
diff --git a/components/microprogram.py b/components/microprogram.py index 869a2ae..6147921 100644 --- a/components/microprogram.py +++ b/components/microprogram.py @@ -145,6 +145,26 @@ class Microprogram: elif opcode==ijvm["OUT"]: self.fetch();self.c["PC"]+=1 # Fetch byte to push in MBR print(str(chr(self.c["MBRU"])),end="") # MBRU because no char which are negative + elif opcode==ijvm["IFEQ"]: + self.c["SP"]=self.c["SP"]-1 + self.c["MAR"]=self.c["SP"] + self.c["OPC"]=self.c["TOS"] + self.rd() + self.c["TOS"]=self.c["MDR"] + if self.c["OPC"]==0: + self.T() + else: + self.F() + elif opcode==ijvm["IFLT"]: + self.c["SP"]=self.c["SP"]-1 + self.c["MAR"]=self.c["SP"] + self.c["OPC"]=self.c["TOS"] + self.rd() + self.c["TOS"]=self.c["MDR"] + if self.c["OPC"]<0: + self.T() + else: + self.F() elif opcode==ijvm["HALT"]: return(1) else: @@ -154,6 +174,19 @@ class Microprogram: raise RuntimeError("Instruction {} not found on address {}".format(opcode,self.c["PC"]-1)) return(0) + def T(self): # This function is here just to follow ijvm implementation of "Structured Computer Organization" + self.fetch();self.c["PC"]+=1 # exactly like GOTO implementation + self.c["OPC"]=self.c["PC"]-1 # exactly like GOTO implementation + ###### GOTO2 ##### + self.c["H"]=self.c["MBR"]<<8 + self.fetch();self.c["PC"]+=1 # Fetch second byte + self.c["H"]=self.c["MBRU"]|self.c["H"] + self.c["PC"]=self.c["OPC"]+self.c["H"] + ################## + def F(self): # This function is here just to follow ijvm implementation of "Structured Computer Organization" + self.fetch();self.c["PC"]+=1 # Needed because memory access take 1 cycle in simulation + self.c["PC"]=self.c["PC"]+1 + def dump(self): """ Print RAM, stack and registers @@ -1,5 +1,9 @@ BIPUSH -7 +-4 +IFLT +0 +4 +BIPUSH +6 BIPUSH -8 -IADD +7 |