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| author | Loic GUEGAN <loic.guegan@yahoo.fr> | 2018-09-03 16:26:14 +0200 |
|---|---|---|
| committer | Loic GUEGAN <loic.guegan@yahoo.fr> | 2018-09-03 16:26:14 +0200 |
| commit | 75d0268477b45f418fd122c441705933aca6938f (patch) | |
| tree | 92502890d1bd32fc5419a7f60b4038d3398abc13 /MicSim/micsim.py | |
| parent | b0b7c993d47beb4796298519c18c1fb43aa51d62 (diff) | |
Diffstat (limited to 'MicSim/micsim.py')
| -rwxr-xr-x | MicSim/micsim.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/MicSim/micsim.py b/MicSim/micsim.py index 23a91fe..5ffa431 100755 --- a/MicSim/micsim.py +++ b/MicSim/micsim.py @@ -15,9 +15,9 @@ def dump(ram,title): # Simple Helper function c=Caretaker(5000) # Init components ram size in byte c["RAM"].loadRamFile("./ram.txt") # Load Ram from file -mic=Microprogram(c) # Create micro program +mic=Microprogram(c) # Create microprogram dump(c["RAM"], "Ram Before Execution") # Dump ram before execution -mic.run(800, 1024) # Run the micro program with run(constantPoolLocation,stackLocation) +mic.run(800, 1024) # Run the microprogram with run(constantPoolLocation,stackLocation) dump(c["RAM"],"Ram After Execution") # Dump ram after execution |