Switch to multiboot2 and improve interrupt management

1 files changed, 9 insertions, 13 deletions

diff --git a/src/utils/pic.c b/src/utils/pic.c
index f77eb70..4459f0d 100644
--- a/src/utils/pic.c
+++ b/src/utils/pic.c
@@ -3,8 +3,8 @@
 #include "mem.h"
 
 struct IDT_REGISTER IDTR={
-    90*8,
-    0
+    100*8,
+    0x0
 };
 
 /// Bridge between IDT and functions call
@@ -22,13 +22,12 @@ asm (
 
 extern u32 PIC_IRQ_DEFAULT,PIC_IRQ_PRINT;
 
-
 void pic_enable_interrupt(){
     // Map first default 32 entries 
-    for(int i=0;i<90;i++){
-        pic_add_idt_entry((IDT_ENTRY){0x08,(u32)&PIC_IRQ_DEFAULT,IDT_TYPE_1});
+    for(int i=0;i<100;i++){
+        pic_add_idt_entry((IDT_ENTRY){0x08,(u32)&PIC_IRQ_DEFAULT,IDT_TYPE_1},i);
         if(i==32)
-            pic_add_idt_entry((IDT_ENTRY){0x08,(u32)&PIC_IRQ_PRINT,IDT_TYPE_1});
+            pic_add_idt_entry((IDT_ENTRY){0x08,(u32)&PIC_IRQ_PRINT,IDT_TYPE_1},i);
     }
 
     // Now configure 8952A
@@ -39,7 +38,7 @@ void pic_enable_interrupt(){
 
     // ICW2: Map IRQ index to entry into the IDT
     outbj(0x21,0x20); // Start interrupt at offset 0x20 in IDT (index 32)
-    outbj(0xA1,0x50); // Start interrupt at offset 0x50 in IDT (index 80)
+    outbj(0xA1,0x70); // Start interrupt at offset 0x50 in IDT (index 80)
 
     // ICW3: Indicate the connection between master and slave
     outbj(0x21,0x02); // Slave connected to pin 2
@@ -51,15 +50,12 @@ void pic_enable_interrupt(){
 
     asm("lidtl (IDTR)");
     asm("sti");
-
 }
 
-void pic_add_idt_entry(IDT_ENTRY entry){
-    static int cur_offset=0;
+void pic_add_idt_entry(IDT_ENTRY entry, int id){
     int descriptor[2];
     descriptor[0]=entry.offset & 0xFFFF | entry.segment << 16;
     descriptor[1]=entry.type & 0xFFFF | entry.offset & 0xFFFF0000;
 
-    memcpy((void*)descriptor, (void *)(IDTR.base+cur_offset),8);
-    cur_offset+=8;
-}
\ No newline at end of file
+    memcpy((void*)descriptor, (void *)(IDTR.base+(id*8)),8);
+}