diff options
Diffstat (limited to 'src/core/apic.cc')
| -rw-r--r-- | src/core/apic.cc | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/src/core/apic.cc b/src/core/apic.cc index 6722a3d..aba801a 100644 --- a/src/core/apic.cc +++ b/src/core/apic.cc @@ -17,23 +17,23 @@ u8 lapic_space[4096] __attribute__((aligned(4096))); u8 ioapic_space[4096] __attribute__((aligned(4096))); - +char enable=0; void apic_enable(){ // Memory Allocation - PAGE_MAP(lapic_space,APIC_LAPIC_ADDR, PAGING_OPT_DEFAULTS); - PAGE_MAP(lapic_space,APIC_LAPIC_ADDR,PAGING_OPT_DEFAULTS); - + PAGE_MAP(lapic_space,APIC_LAPIC_ADDR, PAGING_OPT_PCD|PAGING_OPT_DEFAULTS); + PAGE_MAP(ioapic_space,APIC_IOAPIC_ADDR,PAGING_OPT_PCD|PAGING_OPT_DEFAULTS); + // Configure APIC register location and enable it via MSR - u64 lapic_addr=(u64)APIC_LAPIC_ADDR; + /* u64 lapic_addr=(u64)APIC_LAPIC_ADDR; u32 high=lapic_addr>>32; u32 low=((u64)APIC_LAPIC_ADDR&0xFFFFFFFF); low|=0x800; // Enable apic - WRITE_MSR(0x1B,high,low); + WRITE_MSR(0x1B,high,low);*/ // Configure LAPIC device using mmap apic_write(APIC_LAPIC_REG_SPURIOUS, 0x100&apic_read(APIC_LAPIC_REG_SPURIOUS)); - apic_write(APIC_DFR, 0xFFFFFFFF); - apic_write(APIC_PRIOR, 0); + //apic_write(APIC_DFR, 0xFFFFFFFF); + // apic_write(APIC_PRIOR, 0); apic_write(APIC_LAPIC_TIMER_DVD, 1); apic_write(APIC_LAPIC_TIMER_LVT, (1<<17)|61); apic_write(APIC_LAPIC_TIMER_IC, 100000); @@ -43,6 +43,7 @@ void apic_enable(){ *ioapic_reg=0x12; // Select the 0x12 IRQ ioapic_reg=(u32*)(((u64)ioapic_space)+0x10); // Now use the IOREGWIN to write *ioapic_reg=(0x0<<12)|60; // Enable IRQ 1 (0x12) and assign it to the vector 0x3C (index 60 in the IDT) + enable=1; } void apic_write(u32 reg, u32 value){ @@ -55,6 +56,15 @@ u32 apic_read(u32 reg){ return *lapic_reg; } -extern "C" void ack(){ - apic_write(APIC_EOI, 0); +extern "C" void apic_ack(){ + if(enable){ +/* u8 data; + do { + inb(0x64,data); + } + while((data&0x01) == 0); + inb(0x60,data); */ + + apic_write(APIC_EOI, 0); + } }
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