Debug multiboot, enable apic and ACPI table parsing

8 files changed, 104 insertions, 11 deletions

diff --git a/src/core/apic.cc b/src/core/apic.cc
new file mode 100644
index 0000000..a93e54e
--- /dev/null
+++ b/src/core/apic.cc
@@ -0,0 +1,54 @@
+#include "apic.hpp"
+
+#include "paging.hpp"
+#include "types.hpp"
+#include "asm.hpp"
+#include "libs/stdio.hpp"
+
+extern u64* kpml4;
+char enable=0;
+#define APIC_LAPIC_ADDR 0xFEE00000
+#define APIC_IOAPIC_ADDR 0xFEC00000
+#define APIC_LAPIC_REG_SPURIOUS 0xF0
+
+void apic_enable(){
+    // Allocate APIC registers
+    paging_allocate_addr(kpml4, APIC_LAPIC_ADDR, APIC_LAPIC_ADDR, 
+    PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
+    paging_allocate_addr(kpml4, APIC_IOAPIC_ADDR, APIC_IOAPIC_ADDR, 
+    PAGING_OPT_RW|PAGING_OPT_P|PAGING_OPT_PCD);
+
+    // Configure APIC register location
+    u32 h=APIC_LAPIC_ADDR>>32;
+    u32 l=(APIC_LAPIC_ADDR&0xFFFFFFFF);
+    l|=0x800; // Enable apic
+    WRITE_MSR(0x1B,h,l);
+    
+    // Enable apic 2
+    u8 *c_base=(u8*)APIC_LAPIC_ADDR;
+    c_base+=APIC_LAPIC_REG_SPURIOUS;
+    u32* base=(u32*)c_base;
+    *base=0x100|(*base);
+
+    u8 *c_base2=(u8*)APIC_IOAPIC_ADDR;
+    u32* base2=(u32*)c_base2;
+    *base2=0x12;
+    base2=(u32*)(c_base2+0x10);
+    *base2=(0x0<<12)|0x3C;
+    enable=1;
+}
+
+extern "C" void ack(){
+    if(enable){
+        u8 data;
+    do {
+        inb(0x64,data);
+    }
+    while((data&0x01) == 0);
+    inb(0x60,data);
+
+    u8 *c_base=(u8*)(APIC_LAPIC_ADDR|0xB0);
+    u32* base=(u32*)c_base;
+    *base=*base|0;
+    }
+}
\ No newline at end of file
diff --git a/src/core/apic.hpp b/src/core/apic.hpp
new file mode 100644
index 0000000..edfeaa3
--- /dev/null
+++ b/src/core/apic.hpp
@@ -0,0 +1,6 @@
+#pragma once
+
+
+
+
+void apic_enable();
\ No newline at end of file
diff --git a/src/core/asm.hpp b/src/core/asm.hpp
new file mode 100644
index 0000000..8a931f6
--- /dev/null
+++ b/src/core/asm.hpp
@@ -0,0 +1,23 @@
+#pragma once
+
+#define READ_MSR(reg,high,low) \
+    asm volatile( \
+        "mov %2, %%ecx;rdmsr   \n\t" \
+        "mov %%edx, %0         \n\t" \
+        "mov %%eax, %1" \
+        : "=m" (high), "=m" (low) :"i" (reg))
+
+#define WRITE_MSR(reg,high,low) \
+    asm volatile( \
+        "mov %1, %%edx  \n\t" \
+        "mov %2, %%eax  \n\t" \
+        "mov %0, %%ecx;wrmsr"::"i" (reg), "m" (high), "m" (low))
+
+#define outb(port,value) \
+    asm volatile ("outb %%al, %%dx" :: "a"(value), "d" (port) )
+
+#define outbj(port,value) \
+    asm volatile ("outb %%al, %%dx;" :: "a" (value), "d"(port) )
+
+#define inb(port,dst) \
+    asm volatile ("inb %%dx, %%al": "=a" (dst) : "d" (port))
diff --git a/src/core/idt.cc b/src/core/idt.cc
index b808625..a73d92c 100644
--- a/src/core/idt.cc
+++ b/src/core/idt.cc
@@ -6,7 +6,7 @@ IDT_REGISTER IDTR = {
     IDT_ADDR
 };
 
-extern u64 INT_DEFAULT,INT_0,INT_14;
+extern u64 INT_DEFAULT,INT_0,INT_14,INT_KBD;
 
 void idt_enable_interrupt(void){
     IDT_DESCRIPTOR d;
@@ -25,6 +25,10 @@ void idt_enable_interrupt(void){
             d.offset=(u64)&INT_14;
             idt_write_descriptor(d, i);
         }
+        else if(i==60){ // Page fault
+            d.offset=(u64)&INT_KBD;
+            idt_write_descriptor(d, i);
+        }
         else {
             d.offset=(u64)&INT_DEFAULT;
             idt_write_descriptor(d, i);
diff --git a/src/core/idt.hpp b/src/core/idt.hpp
index f2aca43..2f2050d 100644
--- a/src/core/idt.hpp
+++ b/src/core/idt.hpp
@@ -4,7 +4,7 @@
 #include "libs/stdio.hpp"
 
 #define IDT_GATE_SIZE 16
-#define IDT_MAX_ENTRIES 50
+#define IDT_MAX_ENTRIES 200
 #define IDT_ADDR 0x200000
 
 #define IDT_OPT_P (1 << 15)
@@ -14,8 +14,6 @@
 #define IDT_OPT_PRVL_2 (2 << 13)
 #define IDT_OPT_PRVL_3 (3 << 13)
 
-
-
 typedef struct IDT_REGISTER {
     u16 limit;
     u64 base;
diff --git a/src/core/int.S b/src/core/int.S
index d5ad643..1c8d7bb 100644
--- a/src/core/int.S
+++ b/src/core/int.S
@@ -1,4 +1,5 @@
 .extern printk
+.extern ack
 
 .macro call_printk msg
     mov \msg, %rdi
@@ -26,8 +27,17 @@ INT_14:
     jmp INT_14_INFINITE
     iretq
 
+.globl INT_KBD
+INT_KBD:
+    call_printk $MSG_INT_KBD
+    call ack
+    iretq
 
 MSG_INT_0:
 .asciz "Zero Division error!"
 MSG_INT_14:
 .asciz "Page fault!"
+MSG_INT_KBD:
+.asciz "Key press!"
+MSG:
+.asciz "Called :)\n"
\ No newline at end of file
diff --git a/src/core/paging.cc b/src/core/paging.cc
index b9ab94e..8e58511 100644
--- a/src/core/paging.cc
+++ b/src/core/paging.cc
@@ -4,6 +4,7 @@
 #include "libs/string.hpp"
 
 char paging_status[PAGING_MAX_PAGE / 8];
+u64* kpml4;
 
 void paging_enable() {
     // Init status
@@ -16,16 +17,16 @@ void paging_enable() {
     paging_allocate_contiguous(PAGING_KERNEL_USED_PAGE);
 
     // Setting up new kernel address space
-    u64* pml4=paging_allocate_table();
+    kpml4=paging_allocate_table();
     for(int i=0;i<PAGING_KERNEL_SPACE_MAX_PAGE;i++){
         int addr=i*4096;
-        paging_allocate_addr(pml4,addr,addr, PAGING_OPT_P|PAGING_OPT_RW); // Identity map
+        paging_allocate_addr(kpml4,addr,addr, PAGING_OPT_P|PAGING_OPT_RW); // Identity map
     }
     // Load new pml4
     asm volatile(
         "movq %0, %%rax        \n\t"
         "movq %%rax, %%cr3     \n\t"
-        :: "r" (pml4));
+        :: "r" (kpml4));
 }
 
 u64 paging_as_phy(u64* pml4_table, u64 virt){
@@ -166,8 +167,4 @@ void paging_allocate_addr(u64* pml4_table, u64 virt, u64 phy, u16 options){
         pt_table[pt]|=options;
         return;
     }
-    
-    printk("Virtual address %x already in use. Kernel panic!",virt);
-    while(1);
-
 }
\ No newline at end of file
diff --git a/src/core/paging.hpp b/src/core/paging.hpp
index 1457d10..15d04ad 100644
--- a/src/core/paging.hpp
+++ b/src/core/paging.hpp
@@ -14,6 +14,7 @@
 #define PAGING_ALLOCATE() paging_allocate_contiguous(1)
 #define PAGING_OPT_P 1
 #define PAGING_OPT_RW (1<<1)
+#define PAGING_OPT_PCD (1<<3)
 
 /// @brief Get page address that contain addr
 #define PAGE(addr) (addr&(~(0xFFF)))