From d58349763a312add267dbcaf53d0b9602b177d33 Mon Sep 17 00:00:00 2001 From: Loic GUEGAN Date: Sat, 1 Sep 2018 16:49:12 +0200 Subject: Debug MBR register --- micsim.py | 1 - 1 file changed, 1 deletion(-) (limited to 'micsim.py') diff --git a/micsim.py b/micsim.py index 7cd14bd..46df648 100755 --- a/micsim.py +++ b/micsim.py @@ -13,4 +13,3 @@ c["RAM"]=RAM # Add ram to components mic=Microprogram(c) # Create micro program mic.run() # Run the micro program mic.dump() # Dump ram - -- cgit v1.2.3