From 76d847cf01fb5ed14ccfac70f2c9684142a3cb22 Mon Sep 17 00:00:00 2001 From: Loic GUEGAN Date: Sun, 2 Sep 2018 18:55:31 +0200 Subject: Update RAM --- MicSim/components/ram.py | 2 ++ 1 file changed, 2 insertions(+) (limited to 'MicSim/components') diff --git a/MicSim/components/ram.py b/MicSim/components/ram.py index a0f708e..fa2198d 100644 --- a/MicSim/components/ram.py +++ b/MicSim/components/ram.py @@ -37,6 +37,8 @@ class Ram: addr=self.c["MAR"] if addr>self.lastAddr or addr<0: raise ValueError("You get out of the ram by trying to set a value at address {}, max address is {}".format(addr,self.lastAddr)) + if self.c["MDR"] >=2**32: + raise ValueError("You try to write a the value {} at address {} but this value does not fit in a int".format(self.c["MDR"],addr)) #### Split bytes and write #### self.data[addr+3]=self.c["MDR"] & 0xFF self.data[addr+2]=self.c["MDR"]>>8 & 0xFF -- cgit v1.2.3