From c6aa00eea71c91a219dae8688530ff0a3b83bcd4 Mon Sep 17 00:00:00 2001
From: Loic Guegan <manzerbredes@mailbox.org>
Date: Fri, 9 Apr 2021 18:18:15 +0200
Subject: Enable TSS segment

---
 src/boot/boot.S      | 4 ++++
 src/boot/multiboot.c | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

(limited to 'src/boot')

diff --git a/src/boot/boot.S b/src/boot/boot.S
index 77b04c0..ba25a84 100644
--- a/src/boot/boot.S
+++ b/src/boot/boot.S
@@ -67,6 +67,10 @@ movw $0x18, %ax
 movw %ax, %ss
 movl $0x50000,%esp
 
+# Load 
+mov $0x38, %eax
+ltr %ax
+
 # Start kernel main function
 call bringelle
 
diff --git a/src/boot/multiboot.c b/src/boot/multiboot.c
index 0309eb0..c41aeb7 100644
--- a/src/boot/multiboot.c
+++ b/src/boot/multiboot.c
@@ -20,11 +20,11 @@ char mb_load_tag(char **data, char type){
 
         c_tag_type=c_tag_type+tag_size+4;
         // Skip padding for 64 bits
-        int p=c_tag_type;
+        int p=(int)c_tag_type;
         while((p & 0x7) != 0)
             p++;
         // Assign address after padding
-        c_tag_type=p;
+        c_tag_type=(char *)p;
         c_tag_size=c_tag_type+4;
 
     }
-- 
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